Automatic Synthesis of Transport Triggered Processors
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چکیده
A designer can chose from several options when mapping an application into a combination of hardware and software. Usage of an ASIP offers the advantage of a large design freedom, allowing optimal tuning of performance and costs. However there are two major problems related to the design of ASIPs: 1) the design trajectory is long, and 2) it is impossible to do a quantitative search of the whole design space. The alleviate these problems we propose a design trajectory based on a templated, transport triggered architecture. Using a restricted, but still very large, design space we are able to automate the design trajectory based on a quantitative analysis of many design points. This paper presents this design method and shows its results when the method is applied to two benchmarks.
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تاریخ انتشار 1995